RISC-V: Add augmented hypervisor series extensions.

RISC-V: Add augmented hypervisor series extensions.

The augmented hypervisor series extensions 'sha'[1] is a new profile-defined
extension series that captures the full set of features that are mandated to
be supported along with the 'H' extension.

[1] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc#rva23s64-profile

Version log: Update implements， fix testcase format.

gcc/ChangeLog:

	* config/riscv/riscv-ext.def: New extension defs.
	* config/riscv/riscv-ext.opt: Ditto.
	* doc/riscv-ext.texi: Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/arch-55.c: New test.