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(parent: e43b186) | patch
clk: renesas: r9a09g057: Add clock and reset entries for ISP
authorDaniel Scally <dan.scally@ideasonboard.com>
Fri, 10 Oct 2025 09:43:10 +0000 (10:43 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 14 Oct 2025 08:50:30 +0000 (10:50 +0200)
commit0f537c41831aea18e54d889350e706e221beda63
tree63d0baad431fc508a51891ee1d2f2944a01bb627tree | snapshot
parente43b186df5c4635059f6213d100c9314c1570d02commit | diff
clk: renesas: r9a09g057: Add clock and reset entries for ISP

Add entries detailing the clocks and resets for the ISP in the
RZ/V2H(P) SoC.

Signed-off-by: Daniel Scally <dan.scally@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251010-rzv2h_isp_clk-v2-1-2c8853a9af7c@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a09g057-cpg.c diff | blob | blame | history
drivers/clk/renesas/rzv2h-cpg.h diff | blob | blame | history
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