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(parent: 19272b3) | patch
clk: rockchip: rk3568: Add PLL rate for 132MHz
authorAndy Yan <andy.yan@rock-chips.com>
Sun, 15 Jun 2025 12:39:05 +0000 (20:39 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Thu, 10 Jul 2025 11:47:36 +0000 (13:47 +0200)
commit132b62280a9dbe38c627183ae7f1611de3ee0d9a
tree1e97ced4455cc0ee0b79556da6087d2979a0a23atree
parent19272b37aa4f83ca52bdf9c16d5d81bdd1354494commit | diff
clk: rockchip: rk3568: Add PLL rate for 132MHz

Add PLL rate for 132 MHz to allow raydium-rm67200 panel with
1080x1920 resolution to run at 60 fps that driven by VPLL.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20250615123922.661998-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3568.c diff | blob | blame | history
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