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RISC-V Regression test: Fix FAIL of pr45752.c for RVV
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Mon, 9 Oct 2023 13:02:18 +0000 (21:02 +0800)
committerPan Li <pan2.li@intel.com>
Mon, 9 Oct 2023 13:10:19 +0000 (21:10 +0800)
commit1543f3e331b317c086d9acfbdc2681e510c3d4c8
treec2d751d66dcf92652b1020c96da97cea54293d3etree
parent3f99b709c87acf0c76234d6d054d2813b5e1a5fdcommit | diff
RISC-V Regression test: Fix FAIL of pr45752.c for RVV

RVV use load_lanes with stride = 5 vectorize this case with -fno-vect-cost-model
instead of SLP.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/pr45752.c: Adapt dump check for target supports load_lanes with stride = 5.
gcc/testsuite/gcc.dg/vect/pr45752.c diff | blob | blame | history
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