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(parent: 209c4f6) | patch
Improved front end translations for Neon V{LD,ST}{1,2} instructions,
authorJulian Seward <jseward@acm.org>
Thu, 18 Apr 2013 11:50:58 +0000 (11:50 +0000)
committerJulian Seward <jseward@acm.org>
Thu, 18 Apr 2013 11:50:58 +0000 (11:50 +0000)
commit16884ec3299c3107f96e7bbde6f9baa0d1f71ab8
tree6fb705215b987c07d173125726b7a2385070eaedtree
parent209c4f6ef11721f71c292438ce7452d47f04bdcecommit | diff
Improved front end translations for Neon V{LD,ST}{1,2} instructions,
that do deinterleaving/interleaving via IROps and so generate far
fewer memory references.  As a side effect, fix incorrect ARM back end
implementation of many of the SIMD lane interleaving/deinterleaving
and concatenation IROps.

git-svn-id: svn://svn.valgrind.org/vex/trunk@2708
VEX/priv/guest_arm_toIR.c diff | blob | blame | history
VEX/priv/host_arm_isel.c diff | blob | blame | history
VEX/pub/libvex_ir.h diff | blob | blame | history
Mirror of https://sourceware.org/git/valgrind.git