]> git.ipfire.org Git - thirdparty/gcc.git/commit
[RISC-V][PR target/119830] Fix RISC-V codegen on 32bit hosts
authorAndrew Pinski <quic_apinski@quicinc.com>
Sun, 22 Jun 2025 18:35:19 +0000 (12:35 -0600)
committerJeff Law <jlaw@ventanamicro.com>
Thu, 14 Aug 2025 13:01:59 +0000 (07:01 -0600)
commit1694cbaedd8f9ca6ad9244e4168d2c18b413e6ee
tree303e11da8a6a7c60c7dc7398bdf5170b26800a0d
parente5905a527f523c76b8d7cc2ebe88717fa0ff7d40
[RISC-V][PR target/119830] Fix RISC-V codegen on 32bit hosts

So this is Andrew's patch from the PR.  We weren't clean for a 32bit host in
some of the arithmetic for constant synthesis.

I confirmed the bug on a 32bit linux host, then confirmed that Andrew's patch
from the PR fixes the problem, then ran Andrew's patch through my tester
successfully.

Naturally I'll wait for pre-commit testing, but I'm not expecting problems.

PR target/119830
gcc/
* config/riscv/riscv.cc (riscv_build_integer_1): Make arithmetic in bclr case
clean for 32 bit hosts.

gcc/testsuite/
* gcc.target/riscv/pr119830.c: New test.

(cherry picked from commit 07c02ff39e121a496c46d3a997a25e2f46ce227e)
gcc/config/riscv/riscv.cc
gcc/testsuite/gcc.target/riscv/pr119830.c [new file with mode: 0644]