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arm64: errata: Mitigate TLBI errata on Microsoft Azure Cobalt 100 CPU
authorWill Deacon <will@kernel.org>
Wed, 10 Jun 2026 11:00:21 +0000 (12:00 +0100)
committerWill Deacon <will@kernel.org>
Wed, 10 Jun 2026 11:00:21 +0000 (12:00 +0100)
commit1940e70a8144bf75e6df26bf6f600862ea7f7ea1
treecf65ff80d627e9926c994537376fe0fd8557e824tree | snapshot
parentec7216f92e4ebd485b1c6dc6aa3f6064b71a5768commit | diff
arm64: errata: Mitigate TLBI errata on Microsoft Azure Cobalt 100 CPU

Commit fb091ff39479 ("arm64: Subscribe Microsoft Azure Cobalt 100 to ARM
Neoverse N2 errata") states that Microsoft Azure Cobalt 100 CPU "is a
Microsoft implemented CPU based on r0p0 of the ARM Neoverse N2 CPU, and
therefore suffers from all the same errata.".

So enable the workaround for the latest broadcast TLB invalidation bug
on these parts.

Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arch/arm64/silicon-errata.rst diff | blob | blame | history
arch/arm64/Kconfig diff | blob | blame | history
arch/arm64/kernel/cpu_errata.c diff | blob | blame | history
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