]> git.ipfire.org Git - thirdparty/gcc.git/commit
AArch64: Add implementation for vector cbranch for Advanced SIMD
authorTamar Christina <tamar.christina@arm.com>
Sun, 24 Dec 2023 19:18:53 +0000 (19:18 +0000)
committerTamar Christina <tamar.christina@arm.com>
Sun, 24 Dec 2023 19:30:09 +0000 (19:30 +0000)
commit1bcc07aeb47c0ed7eb50eac8a4e057d6336669ab
tree30d809ede8c1bf0830044c1b42a2bb97e5322fb6
parent01f4251b8775c832a92d55e2df57c9ac72eaceef
AArch64: Add implementation for vector cbranch for Advanced SIMD

Hi All,

This adds an implementation for conditional branch optab for AArch64.

For e.g.

void f1 ()
{
  for (int i = 0; i < N; i++)
    {
      b[i] += a[i];
      if (a[i] > 0)
break;
    }
}

For 128-bit vectors we generate:

        cmgt    v1.4s, v1.4s, #0
        umaxp   v1.4s, v1.4s, v1.4s
        fmov    x3, d1
        cbnz    x3, .L8

and of 64-bit vector we can omit the compression:

        cmgt    v1.2s, v1.2s, #0
        fmov    x2, d1
        cbz     x2, .L13

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md (cbranch<mode>4): New.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve/vect-early-break-cbranch.c: New test.
* gcc.target/aarch64/vect-early-break-cbranch.c: New test.
gcc/config/aarch64/aarch64-simd.md
gcc/testsuite/gcc.target/aarch64/sve/vect-early-break-cbranch.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/vect-early-break-cbranch.c [new file with mode: 0644]