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riscv: Add xmipsexectl instructions
authorAleksa Paunovic <aleksa.paunovic@htecgroup.com>
Thu, 24 Jul 2025 15:23:27 +0000 (17:23 +0200)
committerPaul Walmsley <pjw@kernel.org>
Fri, 19 Sep 2025 16:33:56 +0000 (10:33 -0600)
commit1d4ce63e338fc62f47f22d61cf4b1624caa8cf1c
treeef32936b9e8fe85080460ed4f3561f93f34681detree | snapshot
parenta8fed1bc03ace27902338e4f0d318335883ac847commit | diff
riscv: Add xmipsexectl instructions

Add xmipsexectl instruction opcodes. This includes the MIPS.PAUSE,
MIPS.EHB, and MIPS.IHB instructions.

Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250724-p8700-pause-v5-3-a6cbbe1c3412@htecgroup.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
arch/riscv/include/asm/vendor_extensions/mips.h diff | blob | blame | history
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