]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/i915/dmc: Add pipe dmc registers and bits for DC Balance
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 23 Dec 2025 10:45:24 +0000 (16:15 +0530)
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Tue, 30 Dec 2025 04:29:07 +0000 (09:59 +0530)
commit1dee5a4db242e4e351570b74ab2b5793280eeac9
treeb5e4e5025a3488e5078bb35bb0298a77de554ee4
parent6739e03a9affdc3d94134d8734299971ec8d8bf5
drm/i915/dmc: Add pipe dmc registers and bits for DC Balance

Add pipe dmc registers and  access bits for DC Balance params
configuration and enablement.

--v2:
- Separate register definitions for transcoder and
pipe dmc. (Ankit)
- Use MMIO pipe macros instead of transcoder ones. (Ankit)
- Remove dev_priv use. (Jani, Nikula)

--v3:
- Add all register address, from capital alphabet to small. (Ankit)
- Add EVT CTL registers.
- Add co-author tag.
- Add event flag for Triggering DC Balance.

--v4:
- Add DCB Flip count and balance reset registers.

--v5:
- Correct macro usage for flip count. (Ankit)
- Use register offset in lower case.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251223104542.2688548-3-mitulkumar.ajitkumar.golani@intel.com
drivers/gpu/drm/i915/display/intel_dmc_regs.h