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ASoC: tegra: Update PLL rate for Tegra264
authorSheetal <sheetal@nvidia.com>
Mon, 12 May 2025 05:17:42 +0000 (05:17 +0000)
committerMark Brown <broonie@kernel.org>
Thu, 22 May 2025 10:02:08 +0000 (11:02 +0100)
commit1fb500476f609008ee1c499540af32c4fa5a19de
tree6aa1a5793915fc8304bdb4592cf226133df4dbaetree
parentfa83757df3f40c05b5ab4154253e8aeefa31a9a6commit | diff
ASoC: tegra: Update PLL rate for Tegra264

The PLLs should be set with a VCO frequency in the 900MHz – 1GHz range
to minimize jitter and ppm error for Tegra264. Add the PLLA rate
accordingly.

Therefore, use 983040000 frequency is for multiple of 8K frequencies
and 993484800 frequency is for multiple of 11.025K frequencies.

Signed-off-by: Sheetal <sheetal@nvidia.com>
Link: https://patch.msgid.link/20250512051747.1026770-7-sheetal@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/tegra/tegra_audio_graph_card.c diff | blob | blame | history
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