]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
arm64: dts: ti: k3-j721e-ti-ipc-firmware: Refactor IPC cfg into new dtsi
authorBeleswar Padhi <b-padhi@ti.com>
Mon, 8 Sep 2025 14:28:17 +0000 (19:58 +0530)
committerNishanth Menon <nm@ti.com>
Fri, 12 Sep 2025 04:15:31 +0000 (09:45 +0530)
commit20ca55168b139c78d4e604a59dbc89403781ee0a
tree7a28cae2c11b38169d7014886feaa1050b94b4ae
parentc5b645dbecd6d0b2689fa44eeefe2a2648172dc7
arm64: dts: ti: k3-j721e-ti-ipc-firmware: Refactor IPC cfg into new dtsi

The TI K3 J721E SoCs have multiple programmable remote processors like
R5F, C6x, C7x etc. The TI SDKs for J721E SoCs offer sample firmwares
which could be run on these cores to demonstrate an "echo" IPC test.
Those firmware require certain memory carveouts to be reserved from
system memory, timers to be reserved, and certain mailbox configurations
for interrupt based messaging. These configurations could be different
for a different firmware.

While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://patch.msgid.link/20250908142826.1828676-26-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
arch/arm64/boot/dts/ti/k3-j721e-sk.dts
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi [new file with mode: 0644]