Merge tag 'meson-clk-4.18-2' of https://github.com/BayLibre/clk-meson into clk-meson

Merge tag 'meson-clk-4.18-2' of https://github.com/BayLibre/clk-meson into clk-meson

Pull Second round of update for meson clocks from Jerome Brunet:

 - Add critical flag to meson8b's fdiv2 as temporary fixup for the ethernet.
 - Clean up license headers with SPDX
 - Add round closest support to mpll driver.

* tag 'meson-clk-4.18-2' of https://github.com/BayLibre/clk-meson:
  clk: meson: axg: let mpll clocks round closest
  clk: meson: mpll: add round closest support
  clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICAL
  clk: meson: use SPDX license identifiers consistently