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drm/xe/doc: Wire up PCIe Gen5 limitations
authorRaag Jadav <raag.jadav@intel.com>
Tue, 6 May 2025 05:48:35 +0000 (11:18 +0530)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 7 May 2025 19:31:11 +0000 (15:31 -0400)
commit252c4711973de4e4f3ecddcc18912aecfd4e537c
tree659d4f4310e219b0401ef3c9c21e750af3946ae8tree | snapshot
parent0e414bf7ad012e55c8a0aa4e91f68cb1cf5801ffcommit | diff
drm/xe/doc: Wire up PCIe Gen5 limitations

Append PCIe Gen5 limitations to xe_firmware document.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20250506054835.3395220-4-raag.jadav@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Documentation/gpu/xe/xe_firmware.rst diff | blob | blame | history
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