Merge tag 'renesas-riscv-defconfig-for-v6.2-tag1' of git://git.kernel.org/pub/scm...

Merge tag 'renesas-riscv-defconfig-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig

Renesas RISC-V defconfig updates for v6.2

  - Enable support for the Renesas RZ/Five SoC and the RZ/Five SMARC EVK
    board in the risc-v defconfig.

* tag 'renesas-riscv-defconfig-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  riscv: configs: defconfig: Enable Renesas RZ/Five SoC

Link: https://lore.kernel.org/r/cover.1668788928.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>