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(parent: 1d36507) | patch
drm/i915/bw: Do not consider tile4 as tileY
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 22 May 2026 20:03:46 +0000 (23:03 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 28 May 2026 03:52:44 +0000 (06:52 +0300)
commit2cd48d05fb677287c908555ccdcc3128ed8c55fe
treeab39ccfa502792893fd6a3cab73bcffa509bc10btree | snapshot
parent1d36507381ad3987bae3ca7c9c577ce6b5351054commit | diff
drm/i915/bw: Do not consider tile4 as tileY

For the purposes of memory bandwidth calculations tile4
should not be considered the same as tileY. Make it so.

This should not actually change anything as the affected
code only applies to pre-MTL integrated GPUs, which don't
have tile4.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260522200346.17377-11-ville.syrjala@linux.intel.com
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
drivers/gpu/drm/i915/display/intel_bw.c diff | blob | blame | history
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