]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
net/mlx5: Dynamic cyclecounter shift calculation for PTP free running clock
authorRahul Rameshbabu <rrameshbabu@nvidia.com>
Mon, 21 Aug 2023 23:05:54 +0000 (16:05 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 13 Sep 2023 07:48:07 +0000 (09:48 +0200)
commit2dba15a00998750c86d0bf5b6e89818d412fa088
treea25462a495f038bab18569593d9add8da191e4d7
parent38d98af561d51c319cce09abf0565c1e67ca82e9
net/mlx5: Dynamic cyclecounter shift calculation for PTP free running clock

[ Upstream commit 84a58e60038fa0366006977dba85eae16b2e3d78 ]

Use a dynamic calculation to determine the shift value for the internal
timer cyclecounter that will lead to the highest precision frequency
adjustments. Previously used a constant for the shift value assuming all
devices supported by the driver had a nominal frequency of 1GHz. However,
there are devices that operate at different frequencies. The previous shift
value constant would break the PHC functionality for those devices.

Reported-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Closes: https://lore.kernel.org/netdev/20230815151507.3028503-1-vadfed@meta.com/
Fixes: 6a4010927562 ("net/mlx5: Update cyclecounter shift value to improve ptp free running mode precision")
Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Tested-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Acked-by: Saeed Mahameed <saeedm@nvidia.com>
Link: https://lore.kernel.org/r/20230821230554.236210-1-rrameshbabu@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c