AArch64: rules for CMPBR instructions

AArch64: rules for CMPBR instructions

Add rules for lowering `cbranch<mode>4` to CBB<cond>/CBH<cond>/CB<cond> when
CMPBR extension is enabled.

gcc/ChangeLog:

	* config/aarch64/aarch64-protos.h (aarch64_cb_rhs): New function.
	* config/aarch64/aarch64.cc (aarch64_cb_rhs): Likewise.
	* config/aarch64/aarch64.md (cbranch<mode>4): Rename to ...
	(cbranch<GPI:mode>4): ...here, and emit CMPBR if possible.
	(cbranch<SHORT:mode>4): New expand rule.
	(aarch64_cb<INT_CMP:code><GPI:mode>): New insn rule.
	(aarch64_cb<INT_CMP:code><SHORT:mode>): Likewise.
	* config/aarch64/constraints.md (Uc0): New constraint.
	(Uc1): Likewise.
	(Uc2): Likewise.
	* config/aarch64/iterators.md (cmpbr_suffix): New mode attr.
	(INT_CMP): New code iterator.
	(cmpbr_imm_constraint): New code attr.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/cmpbr.c: