]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Fix selection of pipeline model for sifive-7-series
authorPhilipp Tomsich <philipp.tomsich@vrull.eu>
Wed, 9 Nov 2022 23:43:05 +0000 (00:43 +0100)
committerPhilipp Tomsich <philipp.tomsich@vrull.eu>
Thu, 10 Nov 2022 13:57:02 +0000 (14:57 +0100)
commit2f6cb9c51a933de19cd88f4c9180ac9cf5093522
treefa7d78125227177882b17534e6e31dfcd3f2c555
parent203b127fccc9abe5373c9e3cc03a476c35b1f594
RISC-V: Fix selection of pipeline model for sifive-7-series

A few of the gcc.target/riscv/mcpu-*.c tests have been failing for a
while now, due to the pipeline model for sifive-7-series not being
selected despite -mtune=sifive-7-series.  The root cause is that the
respective RISCV_TUNE entry points to generic instead.  Fix this.

Fixes 97d1ed67fc6 ("RISC-V: Support --target-help for -mcpu/-mtune")

gcc/ChangeLog:

* config/riscv/riscv-cores.def (RISCV_TUNE): Update
sifive-7-series to point to the sifive_7 pipeline description.
gcc/config/riscv/riscv-cores.def