[aarch64] Adjust Falkor's sign extend reg+reg address cost

[aarch64] Adjust Falkor's sign extend reg+reg address cost

Adjust Falkor's register_sextend cost from 4 to 3.  This fixes a testsuite
failure in gcc.target/aarch64/extend.c:ldr_sxtw where GCC was generating
a sbfiz instruction rather than a load with sign extension.

No performance changes.

gcc/ChangeLog:

2018-08-08  Luis Machado  <luis.machado@linaro.org>

	* config/aarch64/aarch64.c (qdf24xx_addrcost_table)
	<register_sextend>: Set to 3.

From-SVN: r263388