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phy: rockchip: samsung-hdptx: Compute clk rate from PLL config
authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>
Mon, 12 Jan 2026 23:20:54 +0000 (01:20 +0200)
committerVinod Koul <vkoul@kernel.org>
Wed, 21 Jan 2026 08:41:57 +0000 (14:11 +0530)
commit3481fc04d969bc1528c2d1f7c02443a9fccf1a83
tree6fa35db93ff1564fd9ac55e6cdc1ec1c203fcd13tree
parentdf74a964e4354e65fefef60c9c50765ff32cd26ecommit | diff
phy: rockchip: samsung-hdptx: Compute clk rate from PLL config

Improve ->recalc_rate() callback of hdptx_phy_clk_ops to calculate the
initial clock rate based on the actual PHY PLL configuration as
retrieved from the related hardware registers.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260113-phy-hdptx-frl-v6-7-8d5f97419c0b@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c diff | blob | blame | history
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