expand: Fix ICE in store_bit_field_using_insv [PR93235]

expand: Fix ICE in store_bit_field_using_insv [PR93235]

The following testcase ICEs on aarch64.  The problem is that
op0 is (subreg:HI (reg:HF ...) 0) and because we can't create a SUBREG of a
SUBREG and aarch64 doesn't have HImode insv, only SImode insv,
store_bit_field_using_insv tries to create (subreg:SI (reg:HF ...) 0)
which is not valid for the target and so gen_rtx_SUBREG ICEs.

The following patch fixes it by punting if the to be created SUBREG
doesn't validate, callers of store_bit_field_using_insv can handle
the fallback.

2021-03-04  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/93235
	* expmed.c (store_bit_field_using_insv): Return false of xop0 is a
	SUBREG and a SUBREG to op_mode can't be created.

	* gcc.target/aarch64/pr93235.c: New test.

(cherry picked from commit 510ff5def87c70836fdbf832228661ae28e524b6)