RISC-V: Add intrinsics support for SiFive Xsfvcp extensions.

RISC-V: Add intrinsics support for SiFive Xsfvcp extensions.

This version is same as v5, but rebase to trunk, send out to trigger CI.

This commit adds intrinsics support for Xsfvcp extension.
Diff with V4: Delete the sifive_vector.h file.

Co-Authored by: Jiawei Chen <jiawei@iscas.ac.cn>
Co-Authored by: Shihua Liao <shihua@iscas.ac.cn>
Co-Authored by: Yixuan Chen <chenyixuan@iscas.ac.cn>

gcc/ChangeLog:

	* config/riscv/constraints.md (Ou01): New constraint.
	(Ou02): Ditto.
	* config/riscv/generic-vector-ooo.md (vec_sf_vcp): New reservation.
	* config/riscv/genrvv-type-indexer.cc (main): New type.
	* config/riscv/riscv-c.cc (riscv_pragma_intrinsic): Add xsfvcp strings.
	* config/riscv/riscv-vector-builtins-shapes.cc (struct sf_vcix_se_def):
	New function.
	(struct sf_vcix_def): Ditto.
	(SHAPE): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_X2_U_OPS): New type.
	(DEF_RVV_X2_WU_OPS): Ditto.
	(vuint8mf8_t): Ditto.
	(vuint8mf4_t): Ditto.
	(vuint8mf2_t): Ditto.
	(vuint8m1_t): Ditto.
	(vuint8m2_t): Ditto.
	(vuint8m4_t): Ditto.
	(vuint16mf4_t): Ditto.
	(vuint16mf2_t): Ditto.
	(vuint16m1_t): Ditto.
	(vuint16m2_t): Ditto.
	(vuint16m4_t): Ditto.
	(vuint32mf2_t): Ditto.
	(vuint32m1_t): Ditto.
	(vuint32m2_t): Ditto.
	(vuint32m4_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_X2_U_OPS): New builtins
	def.
	(DEF_RVV_X2_WU_OPS): Ditto.
	(rvv_arg_type_info::get_scalar_float_type): Ditto.
	(function_instance::modifies_global_state_p): Ditto.
	* config/riscv/riscv-vector-builtins.def (v_x): New base type.
	(i): Ditto.
	(v_i): Ditto.
	(xv): Ditto.
	(iv): Ditto.
	(fv): Ditto.
	(vvv): Ditto.
	(xvv): Ditto.
	(ivv): Ditto.
	(fvv): Ditto.
	(vvw): Ditto.
	(xvw): Ditto.
	(ivw): Ditto.
	(fvw): Ditto.
	(v_vv): Ditto.
	(v_xv): Ditto.
	(v_iv): Ditto.
	(v_fv): Ditto.
	(v_vvv): Ditto.
	(v_xvv): Ditto.
	(v_ivv): Ditto.
	(v_fvv): Ditto.
	(v_vvw): Ditto.
	(v_xvw): Ditto.
	(v_ivw): Ditto.
	(v_fvw): Ditto.
	(x2_vector): Ditto.
	(scalar_float): Ditto.
	* config/riscv/riscv-vector-builtins.h (enum required_ext): New extension.
	(required_ext_to_isa_name): Ditto.
	(required_extensions_specified): Ditto.
	(struct rvv_arg_type_info): Ditto.
	(struct function_group_info): Ditto.
	* config/riscv/riscv.md: New attr.
	* config/riscv/sifive-vector-builtins-bases.cc (class sf_vc): New function.
	(BASE): New base_name.
	* config/riscv/sifive-vector-builtins-bases.h: New function_base.
	* config/riscv/sifive-vector-builtins-functions.def
	(REQUIRED_EXTENSIONS): New intrinsics def.
	(sf_vc): Ditto.
	* config/riscv/sifive-vector.md (@sf_vc_x_se<mode>): New RTL mode.
	(@sf_vc_v_x_se<mode>): Ditto.
	(@sf_vc_v_x<mode>): Ditto.
	(@sf_vc_i_se<mode>): Ditto.
	(@sf_vc_v_i_se<mode>): Ditto.
	(@sf_vc_v_i<mode>): Ditto.
	(@sf_vc_vv_se<mode>): Ditto.
	(@sf_vc_v_vv_se<mode>): Ditto.
	(@sf_vc_v_vv<mode>): Ditto.
	(@sf_vc_xv_se<mode>): Ditto.
	(@sf_vc_v_xv_se<mode>): Ditto.
	(@sf_vc_v_xv<mode>): Ditto.
	(@sf_vc_iv_se<mode>): Ditto.
	(@sf_vc_v_iv_se<mode>): Ditto.
	(@sf_vc_v_iv<mode>): Ditto.
	(@sf_vc_fv_se<mode>): Ditto.
	(@sf_vc_v_fv_se<mode>): Ditto.
	(@sf_vc_v_fv<mode>): Ditto.
	(@sf_vc_vvv_se<mode>): Ditto.
	(@sf_vc_v_vvv_se<mode>): Ditto.
	(@sf_vc_v_vvv<mode>): Ditto.
	(@sf_vc_xvv_se<mode>): Ditto.
	(@sf_vc_v_xvv_se<mode>): Ditto.
	(@sf_vc_v_xvv<mode>): Ditto.
	(@sf_vc_ivv_se<mode>): Ditto.
	(@sf_vc_v_ivv_se<mode>): Ditto.
	(@sf_vc_v_ivv<mode>): Ditto.
	(@sf_vc_fvv_se<mode>): Ditto.
	(@sf_vc_v_fvv_se<mode>): Ditto.
	(@sf_vc_v_fvv<mode>): Ditto.
	(@sf_vc_vvw_se<mode>): Ditto.
	(@sf_vc_v_vvw_se<mode>): Ditto.
	(@sf_vc_v_vvw<mode>): Ditto.
	(@sf_vc_xvw_se<mode>): Ditto.
	(@sf_vc_v_xvw_se<mode>): Ditto.
	(@sf_vc_v_xvw<mode>): Ditto.
	(@sf_vc_ivw_se<mode>): Ditto.
	(@sf_vc_v_ivw_se<mode>): Ditto.
	(@sf_vc_v_ivw<mode>): Ditto.
	(@sf_vc_fvw_se<mode>): Ditto.
	(@sf_vc_v_fvw_se<mode>): Ditto.
	(@sf_vc_v_fvw<mode>): Ditto.
	* config/riscv/vector-iterators.md: New iterator.
	* config/riscv/vector.md: New vtype.