]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
dt-bindings: display: vop2: Add optional PLL clock property for rk3576
authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>
Wed, 11 Jun 2025 21:47:47 +0000 (00:47 +0300)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 30 Jun 2025 09:12:44 +0000 (11:12 +0200)
commit3832dc42aed9b047ccecebf5917d008bd2dac940
treee7fd61d283f229e65225f77f978b7d5aa6783637
parent8733bf4c46f2546bc9225951ae2fee306bbb8e25
dt-bindings: display: vop2: Add optional PLL clock property for rk3576

As with the RK3588 SoC, RK3576 also allows the use of HDMI PHY PLL as an
alternative and more accurate pixel clock source for VOP2.

Document the optional PLL clock property.

Moreover, given that this is part of a series intended to address some
recent display problems, provide the appropriate tags to facilitate
backporting.

Fixes: c3b7c5a4d7c1 ("dt-bindings: display: vop2: Add rk3576 support")
Cc: stable@vger.kernel.org
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250612-rk3576-hdmitx-fix-v1-1-4b11007d8675@collabora.com
Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml