]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
clk: renesas: r9a09g077: Add MTU3 module clock
authorCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Fri, 10 Apr 2026 16:35:21 +0000 (19:35 +0300)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 27 Apr 2026 09:42:09 +0000 (11:42 +0200)
commit38acb2a1a0ced15f61342347bba8aa57775802ea
treed485bec89598c90cf5210b132b1e2e2d368b1d57
parentf34ad4b0b4678d20697f93a79f013d0b6b1d7136
clk: renesas: r9a09g077: Add MTU3 module clock

The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have a MTU3
block connected to the PCLKH and with a module clock controlled by
register 0x308, bit 0.

Add support for the module clock.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260410163530.383818-2-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a09g077-cpg.c