]> git.ipfire.org Git - thirdparty/linux.git/commit
MIPS: Loongson64: env: Fixup serial clock-frequency when using LEFI
authorYao Zi <me@ziyao.cc>
Mon, 2 Feb 2026 04:53:22 +0000 (04:53 +0000)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Thu, 5 Feb 2026 09:01:19 +0000 (10:01 +0100)
commit3989ed41848346ea887bff5d53e3657be42b609c
tree6e64f9a85f2f8eba5c31ee28b1427e772cbd45c9
parent32ec465103527ede09b640cd0ab0636dc58827fb
MIPS: Loongson64: env: Fixup serial clock-frequency when using LEFI

When booting from LEFI firmware, the devicetree is chosen by matching
bridge type and CPU PRID. However, serials on Loongson devices may not
have the same clock frequency across different boards. For example,
CPU UARTs found on Loongson 3A4000 is supplied by the system clock,
which may be either 25MHz or 100MHz.

Luckily, LEFI firmware interface provides information about UART
address and corresponding clock frequency. Let's fixup clock-frequency
properties for serials after FDT selection by matching FDT nodes with
addresses provided by firmware.

Signed-off-by: Yao Zi <me@ziyao.cc>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/loongson64/env.c