[Morello] Implement branch relocations

[Morello] Implement branch relocations

This implements the following static relocations:

- R_MORELLO_CALL26, R_MORELLO_JUMP26
- R_MORELLO_TSTBR14, R_MORELLO_CONDBR19

and the following dynamic relocations:

- R_MORELLO_JUMP_SLOT and R_MORELLO_IRELATIVE

Some notes on the implementation:

- The linker selects morello PLT stubs when it finds at least one
  static relocation that needs a capability GOT slot.

- It is assumed that C64 is not compatible with BTI/PAC, so the latter
  gets overridden.  To allow this, the call to setup_plt_values is
  delayed to take into account htab->c64_plt.

- If the caller is A64, the assembler emits R_AARCH64_JUMP_SLOT,
  otherwise it emits R_MORELLO_JUMP_SLOT.

- The PLT stub is A64-compatible, in that it should do the right thing
  when the execution state is A64.

- If the slots are 16-bytes (this happens when there is at least one
  Morello relocation on the GOT), the references in .plt.got and in
  .got are always capabilities; the dynamic linker will take care of
  that.  For PLT, the default trampoline is a capability.  This is
  true for A64 as well as C64.

- At present it is assumed that there is no interworking between A64
  and C64 functions.

bfd/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* elfnn-aarch64.c (elfNN_c64_small_plt0_entry,
	elfNN_c64_small_plt_entry): New variables.
	(elfNN_aarch64_howto_table): Add relocations.
	(setup_plt_values): Choose C64 PLT when appropriate.
	(bfd_elfNN_aarch64_set_options): Defer setup_plt_values
	call...
	(elfNN_aarch64_link_setup_gnu_properties) ... from here as
	well...
	(elfNN_aarch64_size_dynamic_sections): ... to here.
	(elfNN_aarch64_final_link_relocate,
	elfNN_aarch64_check_relocs, elfNN_aarch64_reloc_type_class):
	Support new relocations.
	(map_symbol_type): New member AARCH64_MAP_C64.
	(elfNN_aarch64_output_arch_local_syms): Use it.
	(aarch64_update_c64_plt_entry): New function.
	(elfNN_aarch64_create_small_pltn_entry): Use it.
	(elfNN_aarch64_init_small_plt0_entry): Emit C64 PLT when
	appropriate.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend,
	_bfd_aarch64_elf_resolve_relocation): Add new relocations.
	* libbfd.h (bfd_reloc_code_real_names): Likewise.
	* reloc.c: New relocations BFD_RELOC_MORELLO_TSTBR14,
	BFD_RELOC_MORELLO_BRANCH19, BFD_RELOC_MORELLO_JUMP26,
	BFD_RELOC_MORELLO_CALL26, BFD_RELOC_MORELLO_JUMP_SLOT and
	BFD_RELOC_MORELLO_IRELATIVE.
	* bfd-in2.h: Regenerate.

gas/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* config/tc-aarch64.c (parse_operands): Choose C64 branch
	relocations when appropriate.
	(md_apply_fix, aarch64_force_relocation,
	aarch64_fix_adjustable): Support C64 branch relocations.

include/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* elf/aarch64.h: New relocations R_MORELLO_TSTBR14,
	R_MORELLO_CONDBR19, R_MORELLO_JUMP26, R_MORELLO_CALL26,
	R_MORELLO_JUMP_SLOT and R_MORELLO_IRELATIVE.

ld/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* testsuite/ld-aarch64/aarch64-elf.exp: Add new tests.
	* testsuite/ld-aarch64/c64-ifunc-2-local.d: New file.
	* testsuite/ld-aarch64/c64-ifunc-2.d: New file.
	* testsuite/ld-aarch64/c64-ifunc-3a.d: New file.
	* testsuite/ld-aarch64/c64-ifunc-3b.d: New file.
	* testsuite/ld-aarch64/c64-ifunc-4.d: New file.
	* testsuite/ld-aarch64/c64-ifunc-4a.d: New file.
	* testsuite/ld-aarch64/ifunc-2-local.s: Support capabilities.
	* testsuite/ld-aarch64/ifunc-2.s: Likewise.

opcodes/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* aarch64-dis.c (get_sym_code_type): Fix C64 PLT disassembly.