]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
riscv: correct riscv_insn_is_c_jr() and riscv_insn_is_c_jalr()
authorNam Cao <namcaov@gmail.com>
Mon, 31 Jul 2023 18:39:25 +0000 (20:39 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 23 Aug 2023 15:32:51 +0000 (17:32 +0200)
commit3f0605239fa28f450c8723973f244e7e976f711b
treecb0eff51125418bc4efe26cc5f9b4dfba68d6ec9
parent761cf8f7a922ba7264bc60f51c9b722a887a115a
riscv: correct riscv_insn_is_c_jr() and riscv_insn_is_c_jalr()

[ Upstream commit 79bc3f85c51fc352f8e684ba6b626f677a3aa230 ]

The instructions c.jr and c.jalr must have rs1 != 0, but
riscv_insn_is_c_jr() and riscv_insn_is_c_jalr() do not check for this. So,
riscv_insn_is_c_jr() can match a reserved encoding, while
riscv_insn_is_c_jalr() can match the c.ebreak instruction.

Rewrite them with check for rs1 != 0.

Signed-off-by: Nam Cao <namcaov@gmail.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Fixes: ec5f90877516 ("RISC-V: Move riscv_insn_is_* macros into a common header")
Link: https://lore.kernel.org/r/20230731183925.152145-1-namcaov@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/riscv/include/asm/insn.h