]> git.ipfire.org Git - thirdparty/linux.git/commit
riscv: add ISA extension parsing for Zilsd and Zclsd
authorPincheng Wang <pincheng.plct@isrc.iscas.ac.cn>
Tue, 26 Aug 2025 16:29:36 +0000 (00:29 +0800)
committerPaul Walmsley <pjw@kernel.org>
Fri, 19 Dec 2025 07:18:34 +0000 (00:18 -0700)
commit3f0cbfb8a107a9f0a6e2184425b70ddc6d51f991
tree31ed6b831be739dccc076e918992863d70329754
parent4115155baf43679575fb463367cdcf8f46e76b18
riscv: add ISA extension parsing for Zilsd and Zclsd

Add parsing for Zilsd and Zclsd ISA extensions which were ratified in
commit f88abf1 ("Integrating load/store pair for RV32 with the
main manual") of the riscv-isa-manual.

Signed-off-by: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn>
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Link: https://patch.msgid.link/20250826162939.1494021-3-pincheng.plct@isrc.iscas.ac.cn
[pjw@kernel.org: cleaned up checkpatch issues, whitespace; updated to apply]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
arch/riscv/include/asm/hwcap.h
arch/riscv/kernel/cpufeature.c