]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
riscv: dts: spacemit: pinctrl: update register and IO power
authorTroy Mitchell <troy.mitchell@linux.spacemit.com>
Thu, 8 Jan 2026 06:42:40 +0000 (14:42 +0800)
committerYixun Lan <dlan@kernel.org>
Tue, 20 Jan 2026 14:41:08 +0000 (22:41 +0800)
commit4083d8d6c0aa445fc440d70a5258351c47547ee2
treea6a5f60a9a1a3fbced45c995599f4bb62df743b3
parent7a61318049861b777f098d7148d892d7dc79b010
riscv: dts: spacemit: pinctrl: update register and IO power

Change the size of the reg register to 0x1000 to match the hardware.
This register range covers the IO power domain's register addresses.

The IO power domain registers are protected. In order to access the
protected IO power domain registers, a valid unlock sequence must be
performed by writing the required keys to the AIB Secure Access Register
(ASAR).

The ASAR register resides within the APBC register address space.
A corresponding syscon property `spacemit,apbc` is added to allow
the pinctrl driver to access this register.

Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Acked-by: Linus Walleij <linusw@kernel.org>
Link: https://lore.kernel.org/r/20260108-kx-pinctrl-aib-io-pwr-domain-v2-3-6bcb46146e53@linux.spacemit.com
Signed-off-by: Yixun Lan <dlan@kernel.org>
arch/riscv/boot/dts/spacemit/k1.dtsi