[to-be-committed,RISC-V,V4] movmem for RISCV with V extension

[to-be-committed,RISC-V,V4] movmem for RISCV with V extension

I hadn't updated my repo on the host where I handle email, so it picked
up the older version of this patch without the testsuite fix.  So, V4
with the testsuite option for lmul fixed.

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And Sergei's movmem patch.  Just trivial testsuite adjustment for an
option name change and a whitespace fix from me.

I've spun this in my tester for rv32 and rv64.  I'll wait for pre-commit
CI before taking further action.

Just a reminder, this patch is designed to handle the case where we can
issue a single vector load/store which avoids all the complexities of
determining which direction to copy.

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gcc/ChangeLog

	* config/riscv/riscv.md (movmem<mode>): New expander.

gcc/testsuite/ChangeLog

	PR target/112109
	* gcc.target/riscv/rvv/base/movmem-1.c: New test