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(parent: 1d90e11) | patch
iommu/arm-smmu: fix programming of SMMU_CBn_TCR for stage 1
authorOlav Haugan <ohaugan@codeaurora.org>
Mon, 4 Aug 2014 18:01:02 +0000 (19:01 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 5 Oct 2014 21:52:15 +0000 (14:52 -0700)
commit433ec1a32c7380567c38226a6c490fd899339017
tree90dcb9aaee6d04fdb5269a28a58c8b46903d7c30tree
parent1d90e1104ed216d8105a2062854ab1c82058b738commit | diff
iommu/arm-smmu: fix programming of SMMU_CBn_TCR for stage 1

commit 1fc870c7efa364862c3bc792cfbdb38afea26742 upstream.

Stage-1 context banks do not have the SMMU_CBn_TCR[SL0] field since it
is only applicable to stage-2 context banks.

This patch ensures that we don't set the reserved TCR bits for stage-1
translations.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/iommu/arm-smmu.c diff | blob | blame | history
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git