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(parent: 1c3044c) | patch
pinctrl: mediatek: mt8167: Fix Schmitt trigger register offset of pins 34-39
authorLuca Leonardo Scorcia <l.scorcia@gmail.com>
Sun, 31 May 2026 16:23:32 +0000 (17:23 +0100)
committerLinus Walleij <linusw@kernel.org>
Mon, 8 Jun 2026 21:55:43 +0000 (23:55 +0200)
commit439bc91d20188901dac698bed4921caac76d9074
treee34f2687c91f8028cd06541299164ef9a4fb36f7tree | snapshot
parent1c3044cab23a056ea28da47da1cdd667a39df0b8commit | diff
pinctrl: mediatek: mt8167: Fix Schmitt trigger register offset of pins 34-39

The correct Schmitt trigger register offset for pins 34-39 is 0xA00. Value
was verified with SoC data sheet.

Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
Fixes: 82d70627e94a ("pinctrl: mediatek: Add MT8167 Pinctrl driver")
Signed-off-by: Linus Walleij <linusw@kernel.org>
drivers/pinctrl/mediatek/pinctrl-mt8167.c diff | blob | blame | history
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