]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
vfio/nvgrace-gpu: Expose the blackwell device PF BAR1 to the VM
authorAnkit Agrawal <ankita@nvidia.com>
Fri, 24 Jan 2025 18:31:00 +0000 (18:31 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 21 Feb 2025 13:01:26 +0000 (14:01 +0100)
commit44e35bfd2e55b8c937862b33210541ecbaa5e4e9
treeeea62a4bead9f6631b7105b2b62430a72a65bb01
parent18457b697f04c04417d52091cd31b50bd403aa05
vfio/nvgrace-gpu: Expose the blackwell device PF BAR1 to the VM

[ Upstream commit 6a9eb2d125ba90d13b45bcfabcddf9f61268f6a8 ]

There is a HW defect on Grace Hopper (GH) to support the
Multi-Instance GPU (MIG) feature [1] that necessiated the presence
of a 1G region carved out from the device memory and mapped as
uncached. The 1G region is shown as a fake BAR (comprising region 2 and 3)
to workaround the issue.

The Grace Blackwell systems (GB) differ from GH systems in the following
aspects:
1. The aforementioned HW defect is fixed on GB systems.
2. There is a usable BAR1 (region 2 and 3) on GB systems for the
GPUdirect RDMA feature [2].

This patch accommodate those GB changes by showing the 64b physical
device BAR1 (region2 and 3) to the VM instead of the fake one. This
takes care of both the differences.

Moreover, the entire device memory is exposed on GB as cacheable to
the VM as there is no carveout required.

Link: https://www.nvidia.com/en-in/technologies/multi-instance-gpu/
Link: https://docs.nvidia.com/cuda/gpudirect-rdma/
Cc: Kevin Tian <kevin.tian@intel.com>
CC: Jason Gunthorpe <jgg@nvidia.com>
Suggested-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Ankit Agrawal <ankita@nvidia.com>
Link: https://lore.kernel.org/r/20250124183102.3976-3-ankita@nvidia.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/vfio/pci/nvgrace-gpu/main.c