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(parent: d4939b7) | patch
drm/msm/a6xx: Append SEL regs to dyn pwrup reglist
authorRob Clark <robin.clark@oss.qualcomm.com>
Tue, 26 May 2026 14:50:49 +0000 (07:50 -0700)
committerRob Clark <robin.clark@oss.qualcomm.com>
Fri, 29 May 2026 14:07:29 +0000 (07:07 -0700)
commit45d4a295b307b67c8a05d5d31a31385d0893553c
tree0811f5eb47eaaa540e3cded65906df16035067d9tree | snapshot
parentd4939b77c118dc3ed78334a897b4bb1c98311c53commit | diff
drm/msm/a6xx: Append SEL regs to dyn pwrup reglist

This is needed so that SEL reg values are restored on exit from IFPC.

Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Reviewed-by: Anna Maniscalco <anna.maniscalco2000@gmail.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/728218/
Message-ID: <20260526145137.160554-16-robin.clark@oss.qualcomm.com>
drivers/gpu/drm/msm/adreno/a6xx_gpu.c diff | blob | blame | history
drivers/gpu/drm/msm/adreno/a6xx_gpu.h diff | blob | blame | history
drivers/gpu/drm/msm/adreno/a8xx_gpu.c diff | blob | blame | history
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