pru: Optimize the extzv and insv patterns

pru: Optimize the extzv and insv patterns

Optimize the generated code for the bit-field extract and insert
patterns:
  - Use bit-set and bit-clear instructions for 1-bit fields.
  - Expand to SImode operations instead of relying on the default
    expansion to word (QI) mode.

gcc/ChangeLog:

	* config/pru/pru.md (extzv<mode>): Make it an expand pattern,
	handle efficiently zero-positioned bit-fields.
	(insv<mode>): New expand pattern.

gcc/testsuite/ChangeLog:

	* gcc.target/pru/ashiftrt.c: Minor update due to new (but
	equivalent) generated code sequence.
	* gcc.target/pru/extzv-1.c: New test.
	* gcc.target/pru/extzv-2.c: New test.
	* gcc.target/pru/extzv-3.c: New test.
	* gcc.target/pru/insv-1.c: New test.
	* gcc.target/pru/insv-2.c: New test.
	* gcc.target/pru/insv-3.c: New test.
	* gcc.target/pru/insv-4.c: New test.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>