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(parent: 25cbc33) | patch
clk: sunxi: Add MBUS Master Clock Gating Register
authorRichard Genoud <richard.genoud@bootlin.com>
Fri, 23 Jan 2026 11:44:56 +0000 (12:44 +0100)
committerMichael Trimarchi <michael@amarulasolutions.com>
Tue, 3 Feb 2026 20:45:14 +0000 (21:45 +0100)
commit4a611a82e5158d5789cb7bbf6feabaadc9d6b796
tree6c014d15bb958db1693360986c8eb00ad80870f3tree
parent25cbc335b47c30f2cc5c08e9610b47bccead3c2acommit | diff
clk: sunxi: Add MBUS Master Clock Gating Register

Add MBUS Master Clock Gating Register for H6 and H616

For H6/H616, the NAND controller needs the MBUS NAND clock along with
CLK_NAND0/1 and CLK_BUS_NAND.

The bit locations are from H6/H616 User Manuals.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
drivers/clk/sunxi/clk_h6.c diff | blob | blame | history
drivers/clk/sunxi/clk_h616.c diff | blob | blame | history
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