]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
arm64: dts: renesas: Add initial SoC DTSI for the RZ/N2H SoC
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tue, 17 Jun 2025 17:19:54 +0000 (18:19 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 11 Aug 2025 09:59:15 +0000 (11:59 +0200)
commit4b3d31f0b81fefae5874467081496467af0f05a7
treec1027f71638985d9ea24f4b897529d2d33f2f9a9
parenta38f991fa19cb0d9375a95e04ccc93e7aaed4d34
arm64: dts: renesas: Add initial SoC DTSI for the RZ/N2H SoC

Add the initial SoC DTSI for the Renesas RZ/N2H ("R9A09G087") SoC, below
is the list of blocks added:
  - EXT CLKs
  - 4x CA55
  - SCIF
  - CPG
  - GIC
  - ARMv8 Timer

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250617171957.162145-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a09g087.dtsi [new file with mode: 0644]