]> git.ipfire.org Git - thirdparty/gcc.git/commit
arm: vld1_types_x3 ACLE intrinsics
authorEzra Sitorus <ezra.sitorus@arm.com>
Tue, 2 Jan 2024 09:23:44 +0000 (09:23 +0000)
committerRichard Earnshaw <rearnsha@arm.com>
Fri, 12 Jan 2024 17:00:34 +0000 (17:00 +0000)
commit4b887e59ace4fb95cf1ed9cfddd070e74512d735
treed60af128d6f690c8116c38542a7a8afb31e5c820
parentd2b4ec9ea3f02793bf837ead78a7f9331d6f9983
arm: vld1_types_x3 ACLE intrinsics

This patch is part of a series of patches implementing the _xN
variants of the vld1 intrinsic for the arm port. This patch adds the
_x3 variants of the vld1 intrinsic.

The previous vld1_x3 has been updated to vld1q_x3 to take into
account that it works with 4-word-length types. vld1_x3 is now
only for 2-word-length types.

ACLE documents:
https://developer.arm.com/documentation/ihi0053/latest/

ISA documents:
https://developer.arm.com/documentation/ddi0487/latest/

gcc/ChangeLog:
* config/arm/arm_neon.h
(vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New.
(vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New.
(vld1_f16_x3, vld1_f32_x3): New.
(vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New.
(vld1_bf16_x3): New.
(vld1q_types_x3): Updated to use vld1q_x3 from
arm_neon_builtins.def
* config/arm/arm_neon_builtins.def
(vld1_x3): Updated entries.
(vld1q_x3): New entries, but comes from the old vld1_x2
* config/arm/neon.md
(neon_vld1q_x3<mode>): Updated from neon_vld1_x3<mode>.

gcc/testsuite/ChangeLog:
* gcc.target/arm/simd/vld1_base_xN_1.c: Updated.
* gcc.target/arm/simd/vld1_bf16_xN_1.c: Updated.
* gcc.target/arm/simd/vld1_fp16_xN_1.c: Updated.
* gcc.target/arm/simd/vld1_p64_xN_1.c: Updated.
gcc/config/arm/arm_neon.h
gcc/config/arm/arm_neon_builtins.def
gcc/config/arm/neon.md
gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c
gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c
gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c
gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c