]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
x86/mce: Do not clear bank's poll bit in mce_poll_banks on AMD SMCA systems
authorAvadhut Naik <avadhut.naik@amd.com>
Fri, 21 Nov 2025 19:04:04 +0000 (19:04 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 2 Jan 2026 11:57:07 +0000 (12:57 +0100)
commit4bb9164e8f21ecb3372dfa051450bdcc1490dbaa
tree84b8f6d97c6dc89571932dea0e88bf946e4fb377
parent2ad1e2faebbdba686fcdf4d38a530763cf729244
x86/mce: Do not clear bank's poll bit in mce_poll_banks on AMD SMCA systems

commit d7ac083f095d894a0b8ac0573516bfd035e6b25a upstream.

Currently, when a CMCI storm detected on a Machine Check bank, subsides, the
bank's corresponding bit in the mce_poll_banks per-CPU variable is cleared
unconditionally by cmci_storm_end().

On AMD SMCA systems, this essentially disables polling on that particular bank
on that CPU. Consequently, any subsequent correctable errors or storms will not
be logged.

Since AMD SMCA systems allow banks to be managed by both polling and
interrupts, the polling banks bitmap for a CPU, i.e., mce_poll_banks, should
not be modified when a storm subsides.

Fixes: 7eae17c4add5 ("x86/mce: Add per-bank CMCI storm mitigation")
Signed-off-by: Avadhut Naik <avadhut.naik@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20251121190542.2447913-2-avadhut.naik@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/kernel/cpu/mce/threshold.c