]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/i915/vrr: Write DC balance params to hw registers
authorMitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Tue, 23 Dec 2025 10:45:33 +0000 (16:15 +0530)
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Tue, 30 Dec 2025 04:32:20 +0000 (10:02 +0530)
commit4ca36702d808e67a68cb51163f3101875594d0ba
tree273d4fa50a7ca02cdcf653e1e060a5be994c4ea9
parentd780bbebaac137869ad5d95bd42e525fec812830
drm/i915/vrr: Write DC balance params to hw registers

Write DC Balance parameters to hw registers.

--v2:
- Update commit header.
- Separate crtc_state params from this patch. (Ankit)

--v3:
- Write registers at compute config.
- Update condition for write.

--v4:
- Address issue with state checker.

--v5:
- Initialise some more dc balance register while enabling VRR.

--v6:
- FLIPLINE_CFG need to be configure at last, as it is double buffer
arming point.

--v7:
- Initialise and reset live value of vmax and vmin as well.

--v8:
- Add separate functions while writing hw registers. (Ankit)

--v9:
- Add DC Balance counter enable bit to this patch. (Ankit)

--v10:
- Add rigister writes to vrr_enable/disable. (Ankit)

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251223104542.2688548-12-mitulkumar.ajitkumar.golani@intel.com
drivers/gpu/drm/i915/display/intel_vrr.c