x86: Remove catomic_* locking primitives

x86: Remove catomic_* locking primitives

Remove obsolete catomic_* locking primitives which don't map
to standard compiler builtins.

There are still a couple of places in the tree that uses them
(malloc/arena.c and malloc/malloc.c).

x86 didn't define __arch_c_compare_and_exchange_bool_* primitives
so fallback code used __arch_c_compare_and_exchange_val_* primitives
instead.  This resulted in unoptimal code for
catomic_compare_and_exchange_bool_acq where superfluous
CMP was emitted after CMPXCHG, e.g. in arena_get2:

   775b8:	48 8d 4a 01          	lea    0x1(%rdx),%rcx
   775bc:	48 89 d0             	mov    %rdx,%rax
   775bf:	64 83 3c 25 18 00 00 	cmpl   $0x0,%fs:0x18
   775c6:	00 00
   775c8:	74 01                	je     775cb <arena_get2+0x35b>
   775ca:	f0 48 0f b1 0d 75 3d 	lock cmpxchg %rcx,0x163d75(%rip)        # 1db348 <narenas>
   775d1:	16 00
   775d3:	48 39 c2             	cmp    %rax,%rdx
   775d6:	74 7f                	je     77657 <arena_get2+0x3e7>

that now becomes:

   775b8:	48 8d 4a 01          	lea    0x1(%rdx),%rcx
   775bc:	48 89 d0             	mov    %rdx,%rax
   775bf:	f0 48 0f b1 0d 80 3d 	lock cmpxchg %rcx,0x163d80(%rip)        # 1db348 <narenas>
   775c6:	16 00
   775c8:	74 7f                	je     77649 <arena_get2+0x3d9>

OTOH, catomic_decrement does not fallback to atomic_fetch_add (, -1)
builtin but to the cmpxchg loop, so the generated code in arena_get2
regresses a bit, from using LOCK DECQ insn:

   77829:	64 83 3c 25 18 00 00 	cmpl   $0x0,%fs:0x18
   77830:	00 00
   77832:	74 01                	je     77835 <arena_get2+0x5c5>
   77834:	f0 48 ff 0d 0c 3b 16 	lock decq 0x163b0c(%rip)        # 1db348 <narenas>
   7783b:	00

to a cmpxchg loop:

   7783d:	48 8b 0d 04 3b 16 00 	mov    0x163b04(%rip),%rcx        # 1db348 <narenas>
   77844:	48 8d 71 ff          	lea    -0x1(%rcx),%rsi
   77848:	48 89 c8             	mov    %rcx,%rax
   7784b:	f0 48 0f b1 35 f4 3a 	lock cmpxchg %rsi,0x163af4(%rip)        # 1db348 <narenas>
   77852:	16 00
   77854:	0f 84 c9 fa ff ff    	je     77323 <arena_get2+0xb3>
   7785a:	eb e1                	jmp    7783d <arena_get2+0x5cd>

Defining catomic_exchange_and_add using __atomic_fetch_add solves the
above issue and generates optimal:

   77809:	f0 48 83 2d 36 3b 16 	lock subq $0x1,0x163b36(%rip)        # 1db348 <narenas>
   77810:	00 01

Depending on the target processor, the compiler may emit either
'LOCK ADD/SUB $1, m' or 'INC/DEC $1, m' instruction, due to partial
flag register stall issue.

Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
Cc: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: Collin Funk <collin.funk1@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>