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(parent: 3de5112) | patch
AArch64: Add SVE memset
authorWilco Dijkstra <wilco.dijkstra@arm.com>
Tue, 24 Dec 2024 18:01:59 +0000 (18:01 +0000)
committerWilco Dijkstra <wilco.dijkstra@arm.com>
Fri, 28 Feb 2025 14:44:23 +0000 (14:44 +0000)
commit52c2b1556f773d9a75d030160e0e273a5ea84502
treeb1df9722ee75ab2c7d1dbecfda065ad892986559tree
parent3de5112326a4274c97f154f3d335c11965ee960ccommit | diff
AArch64: Add SVE memset

Add SVE memset based on the generic memset with predicated load for sizes < 16.
Unaligned memsets of 128-1024 are improved by ~20% on average by using aligned
stores for the last 64 bytes.  Performance of random memset benchmark improves
by ~2% on Neoverse V1.

Reviewed-by: Yury Khrustalev <yury.khrustalev@arm.com>
(cherry picked from commit 163b1bbb76caba4d9673c07940c5930a1afa7548)
sysdeps/aarch64/multiarch/Makefile diff | blob | blame | history
sysdeps/aarch64/multiarch/ifunc-impl-list.c diff | blob | blame | history
sysdeps/aarch64/multiarch/memset.c diff | blob | blame | history
sysdeps/aarch64/multiarch/memset_sve_zva64.S [new file with mode: 0644] blob
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