]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/i915/cx0: Determine Cx0 PLL port clock from PLL state
authorImre Deak <imre.deak@intel.com>
Mon, 17 Nov 2025 10:45:42 +0000 (12:45 +0200)
committerMika Kahola <mika.kahola@intel.com>
Wed, 19 Nov 2025 11:24:22 +0000 (13:24 +0200)
commit538187f17acd4bf94dfc98cdd8630559324fad43
tree0b4c07d263f1dd0895f290a14cdfed9048fa6969
parent90fd33c2626008b8c5e6c30c44b480c21ea41c2d
drm/i915/cx0: Determine Cx0 PLL port clock from PLL state

The port clock is tracked in the PLL state, so there is no need to pass
it separately to __intel_cx0pll_enable(). Drop the port clock function
param accordingly.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20251117104602.2363671-13-mika.kahola@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c