]> git.ipfire.org Git - thirdparty/glibc.git/commit
powerpc: Fix unrecognized instruction errors with recent GCC
authorPaul A. Clarke <pc@us.ibm.com>
Tue, 14 Sep 2021 18:13:33 +0000 (13:13 -0500)
committerAurelien Jarno <aurelien@aurel32.net>
Mon, 10 Jan 2022 21:50:05 +0000 (22:50 +0100)
commit55b99e9ed07688019609bd4dcd17d3ebf4572948
treeeb774b2fe04d924c5d1edb8512a0af2510198d6c
parentc493f6a0e4dcd6fff22da0df9fb2e52ecf4ffff1
powerpc: Fix unrecognized instruction errors with recent GCC

Recent binutils commit b25f942e18d6ecd7ec3e2d2e9930eb4f996c258a
changes the behavior of `.machine` directives to override, rather
than augment, the base CPU. This can result in _reduced_ functionality
when, for example, compiling for default machine "power8", but explicitly
asking for ".machine power5", which loses Altivec instructions.

In tst-ucontext-ppc64-vscr.c, while the instructions provoking the new
error messages are bracketed by ".machine power5", which is ostensibly
Power ISA 2.03 (POWER5), the POWER5 processor did not support the
VSX subset, so these instructions are not recognized as "power5".

Error: unrecognized opcode: `vspltisb'
Error: unrecognized opcode: `vpkuwus'
Error: unrecognized opcode: `mfvscr'
Error: unrecognized opcode: `stvx'

Manually adding the VSX subset via ".machine altivec" is sufficient.

Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
(cherry picked from commit 064b475a2e5662b6b3973fabf505eade86e61510)
sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c