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(parent: 1c57014) | patch
drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards
authorJouni Högander <jouni.hogander@intel.com>
Fri, 16 May 2025 06:30:19 +0000 (09:30 +0300)
committerJouni Högander <jouni.hogander@intel.com>
Mon, 19 May 2025 06:45:47 +0000 (09:45 +0300)
commit5666e27a50666755f8a842f53dd68d6983126ac4
treeb58471c3e79d6df9b4b5a58eb950975c27059e03tree
parent1c57014325ef2b62459c8482768a842f9c40cd0ccommit | diff
drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards

Bspec comment on PSR2_SU_STATUS:

"This register has been tied-off since DG2/ADL-P (it returns zeros only)
and it has been removed on Xe2_LPD."

v2: fix inversed logic

Bspec: 69889
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250516063019.2126702-1-jouni.hogander@intel.com
drivers/gpu/drm/i915/display/intel_psr.c diff | blob | blame | history
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