]> git.ipfire.org Git - thirdparty/gcc.git/commit
[AArch64][SVE] Utilize ASRD instruction for division and remainder
authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 30 Sep 2019 16:55:45 +0000 (16:55 +0000)
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 30 Sep 2019 16:55:45 +0000 (16:55 +0000)
commit59df56a32fdf647a786c14f4ac2ae589faee0beb
tree6743c5d13bf23522c114e0de5e187c1dade8a1c4
parent7085fc55d30ab4c0a4c70609f26be1d753e4f4fc
[AArch64][SVE] Utilize ASRD instruction for division and remainder

2019-09-30  Yuliang Wang  <yuliang.wang@arm.com>

gcc/
* config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3):
New pattern for ASRD.
* config/aarch64/iterators.md (UNSPEC_ASRD): New unspec.
* internal-fn.def (IFN_DIV_POW2): New internal function.
* optabs.def (sdiv_pow2_optab): New optab.
* tree-vect-patterns.c (vect_recog_divmod_pattern):
Modify pattern to support new operation.
* doc/md.texi (sdiv_pow2$var{m3}): Documentation for the above.
* doc/sourcebuild.texi (vect_sdiv_pow2_si):
Document new target selector.

gcc/testsuite/
* gcc.dg/vect/vect-sdiv-pow2-1.c: New test.
* gcc.target/aarch64/sve/asrdiv_1.c: As above.
* lib/target-supports.exp (check_effective_target_vect_sdiv_pow2_si):
Return true for AArch64 with SVE.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276343 138bc75d-0d04-0410-961f-82ee72b054a4
12 files changed:
gcc/ChangeLog
gcc/config/aarch64/aarch64-sve.md
gcc/config/aarch64/iterators.md
gcc/doc/md.texi
gcc/doc/sourcebuild.texi
gcc/internal-fn.def
gcc/optabs.def
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/sve/asrdiv_1.c [new file with mode: 0644]
gcc/testsuite/lib/target-supports.exp
gcc/tree-vect-patterns.c