]> git.ipfire.org Git - thirdparty/linux.git/commit
clk: qcom: dispcc-sc7280: Add dispcc resets
authorBjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Tue, 12 Aug 2025 03:11:34 +0000 (22:11 -0500)
committerBjorn Andersson <andersson@kernel.org>
Tue, 12 Aug 2025 14:59:53 +0000 (09:59 -0500)
commit5a5f478ed7c7394dadb65a96f409e0749caefed5
treec00614f45f66c60c372cd68beac2a53596961c1c
parentccdba33f5c32bca06f5186eedeb15944f84db996
clk: qcom: dispcc-sc7280: Add dispcc resets

Like many other platforms the sc7280 display clock controller provides
a couple of resets for the display subsystem. In particular the
MDSS_CORE_BCR is useful to reset the display subsystem to a known state
during boot, so add these.

Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250811-sc7280-mdss-reset-v1-2-83ceff1d48de@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/dispcc-sc7280.c