Enable more optimization for 32-bit/64-bit shrd/shld with imm shift count.

Enable more optimization for 32-bit/64-bit shrd/shld with imm shift count.

This patch doens't handle variable count since it require 5 insns to
be combined to get wanted pattern, but current pass_combine only
supports at most 4.
This patch doesn't handle 16-bit shrd/shld either.

gcc/ChangeLog:

	PR target/55583
	* config/i386/i386.md (*x86_64_shld_1): Rename to ..
	(x86_64_shld_1): .. this.
	(*x86_shld_1): Rename to ..
	(x86_shld_1): .. this.
	(*x86_64_shrd_1): Rename to ..
	(x86_64_shrd_1): .. this.
	(*x86_shrd_1): Rename to ..
	(x86_shrd_1): .. this.
	(*x86_64_shld_shrd_1_nozext): New pre_reload splitter.
	(*x86_shld_shrd_1_nozext): Ditto.
	(*x86_64_shrd_shld_1_nozext): Ditto.
	(*x86_shrd_shld_1_nozext): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr55583.c: New test.