]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
drm/i915/xe3: Restrict PTL intel_encoder_is_c10phy() to only PHY A
authorDnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Mon, 22 Sep 2025 15:03:17 +0000 (20:33 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 1 Dec 2025 10:45:56 +0000 (11:45 +0100)
commit5d60c61d6db1bf0d77bf730650587a75538fb293
treea2a65fb1316cfaa7f113b64a8fb69924615e98c7
parent1e83ae5df21a091dd5c7604dddc2cc37b9510ddd
drm/i915/xe3: Restrict PTL intel_encoder_is_c10phy() to only PHY A

[ Upstream commit 5474560381775bc70cc90ed2acefad48ffd6ee07 ]

On PTL, no combo PHY is connected to PORT B. However, PORT B can
still be used for Type-C and will utilize the C20 PHY for eDP
over Type-C. In such configurations, VBTs also enumerate PORT B.

This leads to issues where PORT B is incorrectly identified as using the
C10 PHY, due to the assumption that returning true for PORT B in
intel_encoder_is_c10phy() would not cause problems.

From PTL's perspective, only PORT A/PHY A uses the C10 PHY.

Update the helper intel_encoder_is_c10phy() to return true only for
PORT A/PHY on PTL.

v2: Change the condition code style for ptl/wcl

Bspec: 72571,73944
Fixes: 9d10de78a37f ("drm/i915/wcl: C10 phy connected to port A and B")
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20250922150317.2334680-4-dnyaneshwar.bhadane@intel.com
(cherry picked from commit 8147f7a1c083fd565fb958824f7c552de3b2dc46)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/i915/display/intel_cx0_phy.c